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(R) VND830MSP DOUBLE CHANNEL HIGH SIDE DRIVER TYPE VND830MSP (*) Per each channel RDS(on) 60 m (*) IOUT 6 A (*) VCC 36 V 10 CMOS COMPATIBLE INPUTS OPEN DRAIN STATUS OUTPUTS s ON STATE OPEN LOAD DETECTION s OFF STATE OPEN LOAD DETECTION s SHORTED LOAD PROTECTION s UNDERVOLTAGE AND OVERVOLTAGE SHUTDOWN s LOSS OF GROUND PROTECTION s VERY LOW STAND-BY CURRENT s s s 1 PowerSO-10TM ORDER CODES PACKAGE TUBE T&R PowerSO-10TM VND830MSP VND830MSP13TR REVERSE BATTERY PROTECTION (**) DESCRIPTION The VND830MSP is a monolithic device designed in STMicroelectronics VIPower m0-3 Technology, intended for driving any kind of load with one side connected to ground. Active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient BLOCK DIAGRAM compatibility table). Active current limitation combined with thermal shutdown and automatic restart protects the device against overload. The device detects open load condition both in on and off state. Output shorted to VCC is detected in the off state. The openload threshold is aimed at detecting the 5W/12V standard bulb as an openload fault in the on state. Device automatically turns off in case of ground pin disconnection. VCC VCC CLAMP OVERVOLTAGE UNDERVOLTAGE GND INPUT1 STATUS1 CLAMP 1 OUTPUT1 DRIVER 1 CLAMP 2 CURRENT LIMITER 1 LOGIC OVERTEMP. 1 OPENLOAD ON 1 CURRENT LIMITER 2 DRIVER 2 OUTPUT2 INPUT2 OPENLOAD OFF 1 STATUS2 OPENLOAD OFF 2 OVERTEMP. 2 OPENLOAD ON 2 (**) See application schematic at page 8 July 2002 1/18 1 VND830MSP ABSOLUTE MAXIMUM RATING Symbol VCC - VCC - IGND IOUT - IOUT IIN ISTAT Parameter DC Supply Voltage Reverse DC Supply Voltage DC Reverse Ground Pin Current DC Output Current Reverse DC Output Current DC Input Current DC Status Current Electrostatic Discharge (Human Body Model: R=1.5K; C=100pF) - INPUT VESD - STATUS - OUTPUT - VCC Maximum Switching Energy (L=1.8mH; RL=0; Vbat=13.5V; Tjstart=150C; IL=9A) Power Dissipation TC=25C Junction Operating Temperature Case Operating Temperature Storage Temperature Value 41 - 0.3 - 200 Internally Limited -6 +/- 10 +/- 10 4000 4000 5000 5000 100 73.5 Internally Limited - 40 to 150 - 55 to 150 Unit V V mA A A mA mA V V V V mJ W C C C EMAX Ptot Tj Tc Tstg CONNECTION DIAGRAM (TOP VIEW) GROUND INPUT 1 STATUS 1 STATUS 2 INPUT 2 6 7 8 9 10 11 VCC 5 4 3 2 1 OUTPUT 1 OUTPUT 1 N.C. OUTPUT 2 OUTPUT 2 CURRENT AND VOLTAGE CONVENTIONS IS IIN1 INPUT 1 VIN1 VSTAT1 ISTAT1 STATUS 1 IIN2 INPUT 2 VIN2 ISTAT2 STATUS 2 VSTAT2 GND OUTPUT 2 VOUT2 IGND OUTPUT 1 IOUT2 VOUT1 IOUT1 VCC VCC 2/18 1 VND830MSP THERMAL DATA Symbol Rthj-case Rthj-amb Parameter Thermal Resistance Junction-case Thermal Resistance Junction-ambient Value 1.7 51.7 (*) Unit C/W C/W (*) When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35m thick). Horizontal mounting and no artificial air flow. ELECTRICAL CHARACTERISTICS (8V IOUT =2A; Tj =25 C IOUT =2A; VCC> 8V Off State; VCC=13V; VIN=VOUT=0V Off State; VCC=13V; VIN=VOUT=0V; IS (**) Supply Current Tj=25C On State; VCC=13V; VIN=5V; IOUT=0A IL(off1) IL(off2) IL(off3) IL(off4) (**) Per device Off State Output Current Off State Output Current Off State Output Current Off State Output Current VIN=VOUT=0V VIN=0V; VOUT=3.5V VIN=VOUT=0V; Vcc=13V; Tj =125C VIN=VOUT=0V; Vcc=13V; Tj =25C SWITCHING (VCC =13V) Symbol td(on) td(off) dVOUT/ dt(on) dVOUT/ dt(off) Parameter Turn-on Delay Time Turn-off Delay Time Turn-on Voltage Slope Test Conditions RL=6.5 from VIN rising edge to VOUT=1.3V RL=6.5 from VIN falling edge to VOUT=11.7V RL=6.5 from VOUT=1.3V to VOUT=10.4V RL=6.5 from VOUT=11.7V to VOUT=1.3V Min Typ 30 30 See relative diagram See relative diagram Max Unit s s V/s Turn-off Voltage Slope V/s LOGIC INPUT Symbol VIL IIL VIH IIH VI(hyst) VICL Parameter Input Low Level Low Level Input Current Input High Level High Level Input Current Input Hysteresis Voltage Input Clamp Voltage Test Conditions VIN = 1.25V VIN = 3.25V IIN = 1mA IIN = -1mA 0.5 6 6.8 -0.7 Min 1 3.25 10 8 Typ Max 1.25 Unit V A V A V V V 3/18 1 VND830MSP ELECTRICAL CHARACTERISTICS (continued) STATUS PIN Symbol VSTAT ILSTAT CSTAT VSCL Parameter Test Conditions Status Low Output Voltage ISTAT= 1.6 mA Status Leakage Current Normal Operation; VSTAT= 5V Status Pin Input Normal Operation; VSTAT= 5V Capacitance ISTAT= 1mA Status Clamp Voltage ISTAT= - 1mA Min Typ Max 0.5 10 100 6 6.8 -0.7 8 Unit V A pF V V PROTECTIONS Symbol TTSD TR Thyst tSDL Ilim Vdemag Parameter Shut-down Temperature Reset Temperature Thermal Hysteresis Status Delay in Overload Conditions Current limitation Turn-off Output Clamp Voltage Test Conditions Min 150 135 7 Typ 175 15 20 6 9 15 15 VCC-41 VCC-48 VCC-55 Max 200 Unit C C C s A A V Tj>TTSD VCC=13V 5.5V < VCC < 36V IOUT=2A; L= 6mH OPENLOAD DETECTION Symbol IOL tDOL(on) VOL TDOL(off) Parameter Openload ON State Detection Threshold Openload ON State Detection Delay Openload OFF State Voltage Detection Threshold Openload Detection Delay at Turn Off Test Conditions VIN=5V IOUT=0A VIN=0V 1.5 2.5 Min 0.6 Typ 0.9 Max 1.2 200 3.5 1000 Unit A s V s OPEN LOAD STATUS TIMING (with external pull-up) VOUT > VOL VINn IOUT< IOL OVER TEMP STATUS TIMING Tj > TTSD VINn VSTATn VSTATn tSDL tDOL(off) tDOL(on) tSDL 4/18 2 1 VND830MSP Switching time Waveforms VOUTn 90% 80% dVOUT/dt(on) dVOUT/dt(off) 10% t VINn td(on) td(off) t TRUTH TABLE CONDITIONS Normal Operation Current Limitation Overtemperature Undervoltage Overvoltage Output Voltage > VOL Output Current < IOL INPUT L H L H H L H L H L H L H L H OUTPUT L H L X X L L L L L L H H L H STATUS H H H (Tj < TTSD) H (Tj > TTSD) L H L X X H H L H H L 5/18 1 VND830MSP ELECTRICAL TRANSIENT REQUIREMENTS ON VCC PIN ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 CLASS C E I -25 V +25 V -25 V +25 V -4 V +26.5 V II -50 V +50 V -50 V +50 V -5 V +46.5 V TEST LEVELS III -75 V +75 V -100 V +75 V -6 V +66.5 V TEST LEVELS RESULTS II III C C C C C C C C C C E E IV -100 V +100 V -150 V +100 V -7 V +86.5 V Delays and Impedance 2 ms 10 0.2 ms 10 0.1 s 50 0.1 s 50 100 ms, 0.01 400 ms, 2 I C C C C C C IV C C C C C E CONTENTS All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device is not performed as designed after exposure and cannot be returned to proper operation without replacing the device. 6/18 VND830MSP Figure 1: Waveforms NORMAL OPERATION INPUTn OUTPUT VOLTAGEn STATUSn UNDERVOLTAGE VCC INPUTn OUTPUT VOLTAGEn STATUSn undefined VUSD VUSDhyst OVERVOLTAGE VCC OPEN LOAD without external pull-up INPUTn OUTPUT VOLTAGEn STATUSn OVERTEMPERATURE Tj INPUTn OUTPUT CURRENTn STATUSn TTSD TR 7/18 1 VND830MSP APPLICATION SCHEMATIC +5V +5V +5V VCC Rprot STATUS1 Dld C Rprot INPUT1 OUTPUT1 Rprot STATUS2 Rprot INPUT2 GND OUTPUT2 RGND VGND DGND GND PROTECTION REVERSE BATTERY NETWORK AGAINST Solution 1: Resistor in the ground line (RGND only). This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1) RGND 600mV / IS(on)max. 2) RGND (-VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device's datasheet. Power Dissipation in RGND (when VCC<0: during reverse battery situations) is: PD= (-VCC)2/RGND This resistor can be shared amongst several different HSD. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not common with the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on how many devices are ON in the case of several high side drivers sharing the same RGND. If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then the ST suggests to utilize Solution 2 (see below). Solution 2: A diode (DGND) in the ground line. A resistor (RGND=1k) should be inserted in parallel to DGND if the device will be driving an inductive load. This small signal diode can be safely shared amongst several different HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. LOAD DUMP PROTECTION Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds VCC max DC rating. The same applies if the device will be subject to transients on the VCC line that are greater than the ones shown in the ISO T/R 7637/1 table. 8/18 1 1 VND830MSP C I/Os PROTECTION: If a ground protection network is used and negative transient are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the C I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of C and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of C I/Os. -VCCpeak/Ilatchup Rprot (VOHC-VIH-VGND) / IIHmax Calculation example: For VCCpeak= - 100V and I latchup 20mA; VOHC 4.5V 5k Rprot 65k. Recommended Rprot value is 10k. OPEN LOAD DETECTION IN OFF STATE Off state open load detection requires an external pull-up resistor (RPU) connected between OUTPUT pin and a positive supply voltage (VPU) like the +5V line used to supply the microprocessor. The external resistor has to be selected according to the following requirements: 1) no false open load indication when load is connected: in this case we have to avoid VOUT to be higher than VOlmin; this results in the following condition VOUT=(VPU/(RL+RPU))RL V batt. VPU VCC RPU INPUT DRIVER + LOGIC OUT + R STATUS VOL RL IL(off2) GROUND 9/18 VND830MSP Off State Output Current IL(off1) (uA) 2.5 2.25 2 1.75 1.5 1.25 1 0.75 0.5 0.25 0 -50 -25 0 25 50 75 100 125 150 175 High Level Input Current Iih (uA) 5 4.5 Off state Vcc=36V Vin=Vout=0V Vin=3.25V 4 3.5 3 2.5 2 1.5 1 0.5 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) Input Clamp Voltage Vicl (V) 8 7.8 Status Leakage Current Ilstat (uA) 0.05 Iin=1mA 7.6 7.4 7.2 7 6.8 6.6 6.4 6.2 6 -50 -25 0 25 50 75 100 125 150 175 0 -50 -25 0 25 50 75 100 125 150 175 0.01 0.02 0.03 0.04 Vstat=5V Tc (C) Tc (C) Status Low Output Voltage Vstat (V) 0.8 0.7 Status Clamp Voltage Vscl (V) 8 7.8 Istat=1.6mA 0.6 Istat=1mA 7.6 7.4 0.5 0.4 0.3 0.2 7.2 7 6.8 6.6 6.4 0.1 0 -50 -25 0 25 50 75 100 125 150 175 6.2 6 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) 10/18 VND830MSP On State Resistance Vs Tcase Ron (mOhm) 160 140 120 100 70 80 60 40 40 20 10 0 -50 -25 0 25 50 75 100 125 150 175 0 5 10 15 20 25 30 35 40 30 20 60 50 On State Resistance Vs VCC Ron (mOhm) 120 110 Tc=150C Iout=2A Vcc=8V; 13V & 36V 100 90 80 Tc=25C Tc= - 40C Iout=5A Tc (C) Vcc (V) Openload On State Detection Threshold Iol (mA) 1250 1200 1150 1100 1050 1000 950 900 Input High Level Vih (V) 3.6 3.4 Vcc=13V Vin=5V 3.2 3 2.8 2.6 2.4 850 800 750 -50 -25 0 25 50 75 100 125 150 175 2.2 2 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) Input Low Level Vil (V) 2.6 2.4 2.2 Input Hysteresis Voltage Vhyst (V) 1.5 1.4 1.3 1.2 2 1.8 1.6 1.4 1.1 1 0.9 0.8 0.7 1.2 1 -50 -25 0 25 50 75 100 125 150 175 0.6 0.5 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) 11/18 VND830MSP Overvoltage Shutdown Vov (V) 50 48 46 44 42 40 38 36 34 32 30 -50 -25 0 25 50 75 100 125 150 175 Openload Off State Voltage Detection Threshold Vol (V) 5 4.5 Vin=0V 4 3.5 3 2.5 2 1.5 1 0.5 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) Turn-on Voltage Slope dVout/dt(on) (V/ms) 800 700 600 500 400 300 200 100 0 -50 -25 0 25 50 75 100 125 150 175 Turn-off Voltage Slope dVout/dt(off) (V/ms) 600 550 500 450 400 350 300 250 200 -50 -25 0 25 50 75 100 125 150 175 Vcc=13V Rl=6.5Ohm Vcc=13V Rl=6.5Ohm Tc (C) Tc (C) ILIM Vs Tcase Ilim (A) 20 18 Vcc=13V 16 14 12 10 8 6 4 2 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) 12/18 VND830MSP Maximum turn off current versus load inductance ILMAX (A) 100 10 A B C 1 0.1 1 L(mH) A = Single Pulse at TJstart=150C B= Repetitive pulse at TJstart=100C C= Repetitive Pulse at TJstart=125C Conditions: VCC=13.5V Values are generated with RL=0 In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. VIN, IL Demagnetization Demagnetization Demagnetization 10 100 t 13/18 VND830MSP PowerSO-10TM THERMAL DATA PowerSO-10TM PC Board Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm, Cu thickness=35m, Copper areas: from minimum pad lay-out to 8cm2). Rthj-amb Vs PCB copper area in open box free air condition RTHj_amb (C/W) 55 Tj-Tamb=50C 50 45 40 35 30 0 2 4 6 8 10 PCB Cu heatsink area (cm^2) 14/18 VND830MSP PowerSO-10 Thermal Impedance Junction Ambient Single Pulse ZTH (C/W) 1000 100 0.5 cm2 6 cm2 10 1 0.1 0.0001 0.001 0.01 0.1 1 Time (s) 10 100 1000 Thermal fitting model of a double channel HSD in PowerSO-10 Pulse calculation formula Z TH = R TH + Z THtp ( 1 - ) where = tp T 0.5 0.15 0.8 0.7 0.8 12 37 0.0006 2.10E-03 0.013 0.3 0.75 3 6 Thermal Parameter Tj_1 Pd1 C1 C2 C1 C2 C3 C4 C5 C6 R1 R2 R3 R4 R5 R6 Tj_2 R1 Pd2 R2 T_amb Area/island (cm2) R1 (C/W) R2 (C/W) R3( C/W) R4 (C/W) R5 (C/W) R6 (C/W) C1 (W.s/C) C2 (W.s/C) C3 (W.s/C) C4 (W.s/C) C5 (W.s/C) C6 (W.s/C) 22 5 15/18 VND830MSP PowerSO-10TM MECHANICAL DATA DIM. A A (*) A1 B B (*) C C (*) D D1 E E2 E2 (*) E4 E4 (*) e F F (*) H H (*) h L L (*) (*) (*) Muar only POA P013P mm. MIN. 3.35 3.4 0.00 0.40 0.37 0.35 0.23 9.40 7.40 9.30 7.20 7.30 5.90 5.90 1.27 1.25 1.20 13.80 13.85 0.50 1.20 0.80 0 2 1.80 1.10 8 8 0.047 0.031 0 2 1.35 1.40 14.40 14.35 0.049 0.047 0.543 0.545 TYP MAX. 3.65 3.6 0.10 0.60 0.53 0.55 0.32 9.60 7.60 9.50 7.60 7.50 6.10 6.30 MIN. 0.132 0.134 0.000 0.016 0.014 0.013 0.009 0.370 0.291 0.366 0.283 0.287 0.232 0.232 inch TYP. MAX. 0.144 0.142 0.004 0.024 0.021 0.022 0.0126 0.378 0.300 0.374 300 0.295 0.240 0.248 0.050 0.053 0.055 0.567 0.565 0.002 0.070 0.043 8 8 B 0.10 A B 10 H E E2 E E4 1 SEATING PLANE e 0.25 B DETAIL "A" A C D = D1 = = = SEATING PLANE h A F A1 A1 L DETAIL "A" P095A 16/18 1 VND830MSP PowerSO-10TM SUGGESTED PAD LAYOUT 14.6 - 14.9 B TUBE SHIPMENT (no suffix) CASABLANCA MUAR C 10.8- 11 6.30 A A C 0.67 - 0.73 1 2 3 4 5 10 9 8 7 6 1.27 0.54 - 0.6 B 9.5 All dimensions are in mm. Base Q.ty Bulk Q.ty Tube length ( 0.5) Casablanca Muar 50 50 1000 1000 532 532 A B C ( 0.1) 0.8 0.8 10.4 16.4 4.9 17.2 TAPE AND REEL SHIPMENT (suffix "13TR") REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 600 600 330 1.5 13 20.2 24.4 60 30.4 All dimensions are in mm. TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) 24 4 24 1.5 1.5 11.5 6.5 2 End All dimensions are in mm. Start Top cover tape 500mm min Empty components pockets saled with cover tape. User direction of feed 500mm min No components Components No components 17/18 1 VND830MSP Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics (c) 2002 STMicroelectronics - Printed in ITALY- All Rights Reserved. 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